(1). Field of the Invention
The present invention generally relates to the field of semiconductor devices. More specifically, the present invention relates to fabrication of semiconductor devices, particularly field effect transistors.
(2). Description of the Related Art
Silicon-on-insulator (SOI) technology is well-known in the art. This technology utilizes a layer of semiconductor material overlying an insulation layer formed on a supporting bulk wafer. An SOI structure may be formed by way of a number of well-known processes, such as separation by implanted oxygen (SIMOX), zone melting and recrystallization (AMR), or Bonded and Etchback (BESOI). Typically, an SOI structure includes a silicon film formed on a layer of silicon oxide buried in a silicon substrate.
Field effect transistors, such as MOSFETs fabricated in the silicon film of an SOI structure, have many advantages over MOSFETs fabricated on traditional bulk silicon substrates. Such advantages include reduced parasitic capacitance, resistance to short-channel effect, steeper subthreshold slopes, increased current drive, higher packing density, and simpler processing steps. In the past, SOI applications have been limited due to high cost and inferior crystalline quality of SOI wafers. Nevertheless, recent advancements in the SOI silicon film quality, buried oxide quality, and manufacturing throughput have lead to numerous ultra large scale integration (ULSI) applications. The lower complexity/cost of SOI integrated circuit processes, relative to the constantly increasing cost of bulk silicon submicron integrated circuit processes, confers SOI technology a great potential becoming a preferred low cost mainstream production technology.
Despite the attractive qualities of SOI technology, there are certain impediments that undermine part of the benefits of using SOI technology for high-performance, high-density ULSI circuits. MOSFETs fabricated with SOI technology are typically non-fully depleted MOSFETs. Unlike bulk silicon MOSFETs, the substrate of an SOI MOSFET is usually electrically floating. In a non-fully depleted MOSFET, carriers generated by impact ionization accumulate near the channel-oxide junction of the MOS transistor. Eventually sufficient carriers will accumulate to forward bias the body with respect to the gate thus lowering the threshold voltage through the body-bias effect. This effect is further explained in conjunction with the structure illustrated in FIG. 1.
FIG. 1 illustrates a SOI MOS transistor 100. The SOI MOS transistor 100 includes a gate 130 overlying a space (channel region) 108 between drain 107 and source 106. The drain 107 and source 106 are isolated from silicon substrate 102 by a layer of oxide 110. This layer of oxide, helps reduce the drain-substrate and source-substrate capacitances. Despite the attractiveness of the SOI technology which includes good subthreshold characteristics and low junction capacitance due to the oxide layer 110, the SOI technology has disadvantageous side effects. For example, due to the layer of oxide 110, that also isolates the channel region 108, charge 114 builds up on the back interface 116 of channel 108. This charge causes the threshold voltage Vt of the MOS transistor 100 to vary.
When the threshold voltage varies, the drive current varies too. A MOS transistor fabricated by SOI technologies has a relatively low drain current when this transistor is turned on, while later, after transistor 100 has been in use for a longer time, it would have a higher drain current. This is caused by the floating body effect. Due to a strong electric field between the source and the drain, charges from the source and driven to the drain are accelerated by the electric field in the channel. The accelerated charges suffer collisions that create electron-hole pairs. The holes resulting from the collision are repelled by the gate and are attracted to back interface 116. Further, the holes 114 at the back interface 116 cause the threshold voltage to change, (decrease) as the back interface of the device no longer has the same potential. The longer transistor 100 is on, the more charge builds up at the back interface 116 resulting in a decrease in the threshold voltage. A decrease in the threshold voltage causes extra source-drain current to flow thereby producing abnormality in the transfer (current-voltage) characteristic of transistor 100. The floating body effect thus causes unpredictability as to the behavior of the transistor with respect to the current-voltage characteristic.
It is desirable to provide a field effect transistor that has most advantages provided by SOI technology, such as for example reduced junction capacitance, while at the same time having reduced if not eliminated floating body effect.